Memory Mapping

The HuC6280 has a 64KB logical address space and a 2MB physical address space. To access this entire memory space, the processor depends on 8 memory mapping registers, known as MPR0 - MPR7. These registers map each 8KB segment of the logical address space to an 8KB segment in the physical address space.

Thus, the first block of memory, $0000 - $1FFF, is mapped using MPR0. The next segment, $2000 - $3FFF, is mapped using MPR1, and so on. These registers are set using the special TAM and TMA opcodes, described in the opcode section.

To form the physical address, the three high order bits from the logical address are used to select an MPR. The 8 bits in the MPR then become the high order bits of the address, thus forming a 21-bit physical address from a 16-bit logical address.

Here's an example, showing how the address $3F13 is mapped to physical address $1F1F13 using MPR1:

The 2MB physical address space available to the HuC6280 contains all of the memory-mapped I/O necessary to interface with the other chips, the CD subsystem, and the user (through the HuCard and joystick ports). Below is the full memory map for the TurboGrafx / PC Engine family. Each segment is labeled with its corresponding MPR register value ($00 - $FF), a description of the segment's use, its physical address location, and a "chip enable signal" or other descriptive text. The Develo Book describes the chip enable signal as an external signal that becomes true when that area of memory is accessed. Currently, it is not known if these signals correspond with any pins or traces available on the system motherboard. Signals in parentheses, such as (/CEP), represent chip enable signals that are internal to the HuC6280. The notation /SIGNAME is equivalent to a negative logic signal; that is, the signal is active when it is low instead of high.